The present invention relates to a timing generator according to the preamble to claim 1.
Modern timing generators, in particular pulse generators such as e.g. the Hewlett-Packard HP 81100 family, produce timing signals at precise duration and frequencies, with fast edges and high timing resolution. The generated timing signals can almost be regarded as ideal timing signals.
FIG. 1 depicts in a principle block diagram a timing generator 10 as known in the art. The circuit of FIG. 1 generalizes timing generation features as known e.g. from U.S. Pat. No. 5,592,659, U.S. Pat. No. 4,231,104, U.S. Pat. No. 5,280,195, U.S. Pat. No. 4,675,546, U.S. Pat. No. 4,646,030, U.S. Pat. No. 5,361,301, or WO 93/25954. The timing generator 10 comprises as functional units a frequency generator 20, a controllable delay unit 30, and/or a controllable pulse width unit 40. The parameter setting of the frequency generator 20, the delay unit 30 and/or the pulse width unit 40 is controlled by a microprocessor interface 50 via respective converters 60, 70 and 80 (e.g. digital analog converters DACs). The microprocessor interface 50 represents any type of (miniature) electronic device containing memory, arithmetic, logic, and control circuitry necessary to perform functions of a digital computer""s central processing unit, such as interpreting and executing program instructions as well as handling arithmetic operations.
In accordance with the parameter setting, as provided by the microprocessor interface 50 via the converter 60, the frequency generator 20 provides a timing signal at a substantially constant frequency. The delay unit 30 and/or the pulse width unit 40 might change the timing signal delivered from the frequency generator 20 in accordance with their respective parameter setting, as provided from the microprocessor interface 50 via the converter 70 or 80, respectively. Frequency, delay time and/or pulse width of an output signal output of the timing generator 10 can thus be controlled and remain substantially constant unless newly programmed.
For re-programming the timing signal output of the timing generator 10, the microprocessor interface 50 reads out values e.g. from predefined tables, equates from those read out values parameter setup values for setting one or more parameters of the timing generator 10 to specific values, and respectively provides those parameter setup values via the respective converters 60-80 to the frequency generator 20, the delay unit 30 and/or the pulse width unit 40. This re-programming scheme requires a certain amount of time until the respective parameter setup values have been determined/gathered and provided to the respective units, so that the timing of the timing generator 10 cannot be changed fast.
In real environment situations, today""s high-speed signals cannot be considered as ideal. Due to a variety of influences on the signals, the real world signals might considerably deviate from the ideal signals. Such influences might be random jitter, synchronization jitter e.g. from PLL circuits, modulations, and/or timing impairs. On the other hand, with increasing speed of designs, timing margins are decreasing. The result is that the impact of signal-disturbing influences becomes increasingly critical.
In testing environments for testing the performance and characteristics of electronic circuits, those circuits are generally tested with more or less ideal signals. This, however, might lead to the situation that the tested electronic circuit well behaves in the artificial, ideal testing environment but causes failures or other irregularities in its real environments.
In order to simulate/emulate real timing behaviors, arbitrary waveform generators might be applied. Such arbitrary waveform generators, such as the Tektronix AWG500 family, provide programmable waveforms allowing to simulate real environment waveforms in a testing environment. Arbitrary waveform generators, however, find a limitation in their applicable frequency range due to the fact that programmable waveforms can only be generated at signal repetition rates smaller than about one tenth of the sampling rates. Thus, arbitrary waveform generators are often not applicable for high-speed environments. Moreover, arbitrary waveform generators are normally more costly with respect to the same achievable speed performance.
It is therefore an object of the present invention to provide a timing generator applicable to simulate real environment conditions for high-speed signals. The object is solved by the independent claims. Preferred embodiments are shown by the dependent claims.
According to the present invention, parameter setting for parameters such as frequency and/or timing characteristics (e.g. delay time and/or pulse width) of the output signal of the timing generator is accomplished by providing nominal parameter values and, in addition thereto, parameter variation values. While the xe2x80x98nominalxe2x80x99 characteristics (such as frequency and/or timing) of the output signal is determined by the nominal parameter values, the parameter variation values are used to modify or vary the xe2x80x98nominalxe2x80x99 characteristics. This separation of parameter setting, in particular in conjunction with a direct application of the nominal as well as the variation values, allows simulating real environment conditions even for high-speed signals.